Pipe Stress Calculation Engineer
... is required FEM calculation methods Very good communication skills Business fluent ...
Pozice odborní maséři ve zdravotnictví - masér v obci Brno. Vyhledáno 154 nových nabídek v této lokalitě.
Proposal Lead with French language - Security Systems
... an Engineer.Our benefitsBesides a very pleasant and international work environment ...
Junior Hardware Verification Engineer (CZ)
What is Codasip about? We believe Codasip is the most innovative processor solutions company. We take pride in designing and developing cutting-edge, high-performance , and energy-efficient CPU cores from scratch, and our own automated proprietary tools to ...
Hardware Design Engineer (CZ)
TL;DR :) Application processors, Embedded processors - CodAL - RISC-V ISA - Processor Microarchitecture - Linux-capable cores - CPU - Multi-core CPU architectures - International team - Start-up culture Locations: Czech Republic (Brno Prague) Department: ...
Hardware Verification Engineer (CZ)
TL;DR :) Digital Design Verification - CodAL - RISC-V ISA - Processor Microarchitecture - CPU - Start-up culture Locations: Brno, Prague, Remote CZ (Hybrid mode) Department: Czech R&D HW Engineering Employment Type: Full-Time Experience: Mid-Senior Level ...
Technician, R and D
Together we are manufacturing the future We are looking for extraordinarily hardworking and forward:thinking people to be part of a team dedicated to delivering industry:leading performance through outstanding talent, an innovative culture and teamwork. If ...
Technical Support (Mechanical engineering and Robotics)
... . - Languages: Czech – Mother tongue, English – Very good verbal and writing reading ...
Invoice Process Specialist (Portuguese Speaker)
... of processed invoices. The Profile Very good level of Portuguese (oral ...
Principal FPGA/Hardware Design Engineer
We’re looking for a Princiapal FPGA Hardware Design Engineer to join us in our Brno office as part of the platforms team. The platform team designs FPGA systems based around Codasip’s RISC-V cores and supporting IP such as security IP and system ...
Senior FPGA/Hardware Design Engineer
We’re looking for a Senior FPGA Hardware Design Engineer to join us in our Brno office as part of the platforms team. The platform team designs FPGA systems based around Codasip’s RISC-V cores and supporting IP such as security IP and system peripherals. ...