We’re looking for a Senior FPGA Hardware Design Engineer to join us in our Brno office as part of the platforms team. The platform team designs FPGA systems based around Codasip’s RISC-V cores and supporting IP such as security IP and system peripherals. ...
Hardware design engineer Description TL;DR :) Embedded processors - CodAL - RISC-V ISA - Processor Microarchitecture - CPU - Low power area CPU architectures - HLS - International team - Start-up culture Locations: Czech Republic (Brno Prague) Department ...
We’re looking for a Princiapal FPGA Hardware Design Engineer to join us in our Brno office as part of the platforms team. The platform team designs FPGA systems based around Codasip’s RISC-V cores and supporting IP such as security IP and system ...
... At Zone, we use our very own Software Development Kit (SDK) – ...